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Controlling Network Processors by using Packet-processing Cores

Kanada, Y., 2nd International Workshop on Network Management and Monitoring (NetMM 2014), May 2014.
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Abstract – A network processor (NP) usually contains multiple packet processing cores (PPCs) and a control processing core (CPC), and the synchronization and communication between CPC and PPCs, which is required for controlling an NP, is very complex. To reduce the complexity, a method for controlling packet processing in NPs by using PPCs is proposed. By means of this method, complex control messages are partially processed and divided into simplified control packets by a CPU outside the NP chip, and these packets are sent to a control-processing PPC. The control-processing PPC controls data-processing PPCs by using data-exchange mechanisms, such as a shared memory or an on-chip network, which are more uniform and simpler than those between a CPC and PPCs. This control method is applied to a virtual-link controlprocessing task and packet-processing tasks in a network node with a virtualization function. Both tasks are described by a hardware-independent high-level language called “Phonpl,” and communication between the PPCs is programmed following normal and uniform shared-memory semantics. As a result, programming the control-processing task and porting the program become much easier.

研究テーマ紹介: ネットワーク仮想化

キーワード: Network processors, Multi core, Control processing, Packet processing, Network virtualization



2014-02-20 23:03に投稿されたエントリーのページです。


(C) 2008 by Yasusi Kanada
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